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GlobalFoundries, TSMC로부터 20억 달러 규모의 수주를 확보하며 미국 내 첫 CoWoS 인터포저 생산 능력을 구축하게 되었다.

미국 내 CoWoS 인터포저 생산을 GlobalFoundries를 통해 국내로 들여오면 AI 가속기의 대만 기반 첨단 패키징 의존도를 낮출 수 있다. 다만 원문에는 구체적인 일정이 명시되어 있지 않다.
업계 전문지Slicast · 2026년 10월 10일 09:05 UTC · 미국 · 출처: BigGo Finance
중요도 78

GlobalFoundries, the world's fifth-largest semiconductor foundry, has signed a multi-year manufacturing agreement with TSMC valued at approximately $2 billion (about 13.4 billion yuan). Under the deal, GlobalFoundries will supply silicon interposers, a critical component of TSMC's CoWoS advanced packaging ecosystem, from its US manufacturing base. This is the first time such capacity has been established in the United States, signaling that AI chip supply chain localization is extending from wafer fabrication into packaging materials.

According to disclosures from both companies, GlobalFoundries will expand capacity at its Malta, New York facility to provide manufacturing services for TSMC. The supply scope covers components including embedded deep-trench capacitors. Volume production is expected to begin in the first half of 2028. The initial agreement term is five years, with a framework in place for future capacity expansion aligned with customer demand. Following the announcement, GlobalFoundries shares rose approximately 4% in pre-market trading.

## What Silicon Interposers Do

Silicon interposers are the core component of CoWoS packaging technology. CoWoS, TSMC's 2.5D advanced packaging solution, places a silicon interposer between the chip and the package substrate. Through-silicon vias (TSVs) provide high-density interconnects, allowing logic chips and High Bandwidth Memory (HBM) to work together within a single package.

This technology addresses the "data movement" bottleneck in AI chips. No matter how powerful a single chip's compute capability is, overall performance suffers if memory bandwidth cannot keep pace. By tightly integrating multiple chips with HBM, CoWoS shortens interconnect distances, boosts bandwidth, and reduces power consumption. It serves as a critical foundation for AI accelerators from Nvidia, AMD, and other manufacturers.

TSMC's CoWoS technology comes in three variants:

| Variant | Interposer Structure | Key Characteristics |

|---|---|---|

| CoWoS-S | Full silicon interposer with TSV interconnect | Highest performance ceiling; larger interposer area makes yield harder to control and costs higher |

| CoWoS-R | Multi-layer RDL with polymer and copper wiring | Lower cost |

| CoWoS-L | RDL for large-area routing, with LSI tiles embedded locally for high-bandwidth needs | Balances performance and package size |

CoWoS-S is the current mainstream solution for AI GPUs. The silicon interposers GlobalFoundries will supply primarily serve this variant.

## Capacity Bottlenecks and the Expansion Race

As AI chip sizes grow and more chips are integrated into a single package, CoWoS capacity has become a core bottleneck limiting AI chip delivery. TSMC is addressing this through both capacity expansion and technology iteration.

On the capacity side, TSMC's CoWoS monthly capacity roadmap rises from approximately 35,000 wafers at the end of 2024 toward a target of 130,000 to 140,000 by the end of 2026, with potential to double to roughly 260,000 by the end of 2028. On the technology side, package sizes are growing year over year. The 5.5x reticle-size interposer entered production in 2026, a 14x reticle-size version integrating 20 HBM stacks is slated for 2028, and 24 HBM stacks are planned for 2029.

*Note: Values represent year-end target capacity. The 2026 target range was originally 130,000–140,000 wafers, and the chart uses the lower bound of 130,000.*

## GlobalFoundries' Packaging Position

GlobalFoundries is not starting from scratch in advanced packaging. Its 65PKG silicon interposer platform achieved production qualification in 2024, reaching Technology Readiness Level 9 (TRL9). The platform incorporates TSV technology and supports wafer-to-wafer and chip-to-wafer integration for interconnecting heterogeneous logic, memory, and power devices in 3D architectures.

In May 2026, the company introduced SCALE, a co-packaged optics solution based on silicon photonics for AI data centers, which has demonstrated 8λ and 16λ bidirectional dense wavelength division multiplexing transmission. In June, its SLATE wafer-to-wafer bonding technology achieved production readiness on the 9SW RF platform.

Ed Kaste, Senior Vice President of CMOS Business at GlobalFoundries, said that advanced packaging is increasingly critical to the performance, energy efficiency, and scale of next-generation AI systems. He added that GlobalFoundries will leverage its US manufacturing footprint to provide a secure, scalable supply source for this critical segment.

## Strategic Cooperation Amid Competition

GlobalFoundries and TSMC are both semiconductor foundries and compete directly in the mature process node market. This partnership cuts across that competitive dynamic, reflecting the complexity of the AI chip supply chain. Amid severe advanced packaging capacity shortages, even competitors can become suppliers of critical components.

GlobalFoundries was founded in 2009 and is headquartered in Malta, New York. It was established as a joint venture between Abu Dhabi sovereign fund Mubadala and AMD. Its manufacturing footprint spans the United States, Europe, and Asia, including fabs in Malta, New York; Burlington, Vermont; Dresden, Germany; and Singapore. The company focuses on differentiated process technologies and specialty offerings, providing chips for AI deployments from cloud to edge in areas such as RF and gallium nitride (GaN) power devices.

For GlobalFoundries, the $2 billion order extends its business into advanced packaging materials and deepens its participation in the AI value chain. For TSMC, once the collaboration comes online, CoWoS packaging, a segment previously highly dependent on Asian capacity, gains a new US-based supply source.

GlobalFoundries' production timeline is set for the first half of 2028. Whether it can meaningfully alleviate advanced packaging constraints by then will depend on how quickly the new capacity ramps and how overall supply chain bottlenecks evolve. Competition for AI chip capacity is extending from front-end processes into packaging, and supply chain localization is spreading from wafer fabrication to packaging components. The GlobalFoundries-TSMC deal is the latest example of this trend.

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GlobalFoundries, TSMC로부터 20억 달러 규모의 수주를 확보하며… · Slicast