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TSMC는 AI 패키징 생산능력이 한계에 도달함에 따라 CoWoS 패키징 가격을 20% 인상하는 방안을 검토 중인 것으로 전해졌다.

만약 확인될 경우, CoWoS 가격이 20% 인상되면 TSMC의 첨단 패키징에 의존하는 모든 AI 칩 설계 기업의 비용이 증가하게 되며, 패키징이 여전히 핵심 병목 요인이라는 점을 보여준다.
업계 전문지Slicast · 2026년 10월 27일 16:20 UTC · 미국 · 출처: news.lavx.hu
중요도 70

TSMC is weighing a price increase of as much as 20% for its Chip on Wafer on Substrate (CoWoS) advanced packaging technology, according to Trendforce and supply chain sources. The increase reflects strained capacity amid surging AI demand and longer delivery times for chipmaking tools. Such a hike would carry significant weight, as CoWoS ranks among the tightest links in the AI supply chain. TSMC has not confirmed the report.

CoWoS combines logic dies and high-bandwidth memory (HBM) stacks within a single package. AI accelerators rely on this architecture for the data bandwidth that demanding workloads require, and building these packages grows harder as chip designers pack in more compute and memory. Nvidia's Blackwell pairs two large GPU dies with eight HBM3E stacks. The upcoming Rubin and Rubin Ultra chips will expand integration further, increasing pressure on packaging and the supply chain that supports it.

Testing has become another bottleneck. Blackwell takes three to four times longer to test than Nvidia's previous-generation Hopper, and Rubin could need seven times longer. Extended test cycles keep equipment occupied, making it harder to increase output as demand grows.

GPUs are not the only products competing for capacity. Server CPUs and custom ASICs also require advanced packaging, adding strain to an already crowded supply chain.

Equipment lead times have stretched from three to six months to eight months, and timely access to fab equipment now matters more than price. TSMC placed this year's equipment orders at existing prices rather than negotiating discounts or additional features, departing from its customary practice of using purchasing power to secure better terms. The company's priority is getting the tools on time.

The squeeze follows a September report that said TSMC's projected semiconductor equipment requirements had grown to roughly twice the level of six months earlier as the company expanded production to meet AI demand. Cliff Hou, deputy co-COO at TSMC, said that by July the company's expected equipment needs had reached 1.9 times its original estimate as AI demand accelerated. "Compared with the pattern 30 years ago, we have never seen the demand increase that much, that frequency of changes," Hou said.

TSMC is working to broaden its packaging supply chain. Earlier this month, GlobalFoundries agreed to produce silicon interposers for TSMC's CoWoS in the U.S. under a five-year contract worth $2 billion, with production expected to ramp in the first half of 2028. Interposers cover only one part of the packaging flow, so the agreement alone will not eliminate shortages.

Higher costs extend beyond packaging. TSMC is considering broader price increases for 2027, with analysts expecting wafer prices on advanced process technologies to rise 5% to 10%. Customers using 2nm and 3nm-class nodes could face the steepest hikes. Those seeking capacity beyond their original allocations may have to pay additional premiums, which could push some costs up by as much as 25%.

Industry estimates cited by Trendforce put TSMC's monthly capacity at over 106,000 wafers in 2026, with a target of 227,000 wafers in 2027 as the company works to keep pace with demand for increasingly complex AI processors.

If both the packaging and wafer price increases materialize, the cost of AI hardware will climb further, and some of that burden will pass down the supply chain.

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TSMC는 AI 패키징 생산능력이 한계에 도달함에 따라 CoWoS 패키징 가격을… · Slicast