TSMC는 Nvidia의 Blackwell 및 차세대 Rubin 칩으로 인해 패키징 생산능력에 대한 압박이 커지는 가운데, CoWoS 첨단 패키징 기술의 가격을 최대 20% 인상하는 방안을 검토하고 있는 것으로 전해졌다.

TSMC is reportedly weighing a price increase of as much as 20% for its Chip on Wafer on Substrate (CoWoS) advanced packaging technology, according to TrendForce, which cites supply chain sources and local media. The increase reflects strained capacity amid AI demand and longer delivery times for chipmaking tools. Such a hike would be significant, as CoWoS is already one of the tightest links in the AI supply chain. TSMC has yet to confirm the report.

CoWoS combines logic dies and high-bandwidth memory (HBM) stacks within a single package, which is how AI accelerators get the data bandwidth that demanding workloads require. Building these packages is getting harder as chip designers pack in more compute and memory. Nvidia's Blackwell already pairs two large GPU dies with eight HBM3E stacks, while the upcoming Rubin and Rubin Ultra are expected to push integration further, increasing pressure on packaging and the supply chain that supports it.

Testing is becoming another bottleneck. Blackwell reportedly takes three to four times longer to test than Nvidia's previous-generation Hopper, and Rubin could need as much as seven times longer. Extended test cycles keep equipment occupied for longer, making it harder to increase output as demand grows. GPUs are not the only products competing for capacity. Server CPUs and custom ASICs also require advanced packaging, adding more strain to an already crowded supply chain.

Tools are also taking longer to arrive. Equipment lead times have reportedly stretched from three to six months to as long as eight months, making timely access to fab equipment increasingly important. As a result, TSMC has reportedly placed this year's equipment orders at existing prices rather than negotiating discounts or extra features. This is a departure from the company's customary approach of using its purchasing power to secure better terms. In essence, getting the tools on time now appears to matter more to the company than getting them cheaply.

The squeeze echoes a September report stating that TSMC's projected semiconductor equipment requirements had almost doubled in six months as the company expanded production to meet AI demand. Cliff Hou, deputy co-COO at TSMC, said that by July the company's expected equipment needs had reached 1.9 times its original estimate as AI demand accelerated. "Compared with the pattern 30 years ago, we have never seen the demand increase that much, that frequency of changes," Hou said at the time.

TSMC is also trying to broaden its packaging supply chain. Earlier this month, GlobalFoundries agreed to produce silicon interposers for TSMC's CoWoS in the U.S. under a five-year contract worth $2 billion, with production expected to ramp up in the first half of 2028. However, interposers are only one part of the packaging flow, so the agreement alone will not eliminate shortages.

Higher costs are not limited to packaging. TSMC is reportedly considering broader price increases for 2027, with wafer prices on advanced process technologies expected to rise by 5% to 10%. Customers using 2nm and 3nm-class nodes could face the steepest hikes, while those seeking capacity beyond their original allocations may have to pay additional premiums, which could push some costs up by as much as 25%.

Industry estimates cited by TrendForce put TSMC's monthly capacity at over 106,000 wafers in 2026, with a target of 227,000 wafers in 2027 as the company works to keep pace with demand for increasingly complex AI processors. If both the packaging and wafer price increases materialize, the cost of AI hardware will likely climb further, and some of that will inevitably be passed down the chain.