TSMC and GlobalFoundries finalized a $2 billion deal for GlobalFoundries to expand advanced silicon interposer production capacity in the United States for AI chip packaging.
A significant gap in America's domestic semiconductor supply chain is being addressed. US-based wafer-fab GlobalFoundries announced a $2 billion partnership with TSMC on Thursday to strengthen American manufacturing of advanced semiconductors used in AI datacenters. Under the multi-year agreement, GlobalFoundries will produce silicon interposers for TSMC's chip-on-wafer-on-substrate (CoWoS) advanced packaging specification at its Malta, New York facility.
Silicon interposers are critical components in multi-die chip assemblies such as GPUs and AI accelerators. These interposers sit beneath the compute logic and memory, providing a higher-speed, lower-power communication path between chips than conventional organic packaging allows. Virtually every chip employing high-bandwidth memory (HBM) today relies on some form of interposer or interconnect bridge to integrate its components.
Advanced packaging has become a major bottleneck for American chip manufacturing. When TSMC began producing Nvidia's Blackwell GPUs at its Arizona facility last year, the finished products still required shipment to Taiwan and back for final assembly. TSMC has contracted with Amkor, an outsourced semiconductor assembly and test (OSAT) provider, for CoWoS-compatible packaging services in the US and has broken ground on its own advanced packaging facilities in Arizona. However, neither facility is expected to become operational until 2028 and 2029 respectively.
GlobalFoundries plans to add additional capacity at its Malta plant to meet demand, though volume production is not expected to begin until the first half of 2028 at the earliest. The partnership is structured for five years with an option to extend.
While CoWoS packaging remains a bottleneck for American chipmaking, it is not the only option available—merely the most widely adopted. Intel Foundry already offers both leading-edge process technology and advanced packaging capabilities comparable to TSMC's CoWoS offerings. Notably, this technology is compatible with silicon produced at TSMC fabs; Intel routinely packages chips manufactured by TSMC in its own facilities. Although this approach requires designing parts around Intel's packaging specifications, it represents an alternative path if domestic chip production becomes a priority before competing facilities come online.