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CXMT (ChangXin Memory) achieves 50% higher dies-per-wafer density using its new G5 DRAM process technology, improving yield and capacity for AI-chip HBM supply.

Advances Chinese domestic HBM production as response to U.S. export controls; key enabler for in-house Chinese accelerators (Zhenwu, DCU); yield improvements reduce cost per HBM unit and accelerate domestic AI-chip production ramp.
Trade pressSlicast · September 22, 2026 at 12:09 UTC · US · Source: OC3D
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CXMT (ChangXin Memory) achieves 50% higher… · Slicast