CXMT (ChangXin Memory) achieves 50% higher dies-per-wafer density using its new G5 DRAM process technology, improving yield and capacity for AI-chip HBM supply.

Less than a month after announcing its LPDDR6 technology, ChangXin Memory Technologies (CXMT) has reached a new production milestone with its 5th-generation "G5" DRAM platform. The company has begun mass production of two new LPDDR5X products featuring significantly improved DRAM densities.

The G5 platform achieves an active-area half-pitch of 11.95nm, narrowing the gap between CXMT and industry leaders Samsung, Micron, and SK Hynix. Most notably, CXMT claims the technology enables 50% more dies per wafer than its previous-generation DRAM platform.

While the die density increase is substantial, CXMT has not disclosed silicon yield rates, making it uncertain whether the company can achieve 50% higher functional DRAM output per wafer. Nevertheless, the improvement should bolster CXMT's production volumes and help address the global DRAM shortage.

The company's first confirmed G5 product is the 24Gb LPDDR5X memory chip, which has entered mass production. Reports indicate these chips are already being integrated into new Chinese smartphones.

The advancement demonstrates continued progress in CXMT's manufacturing capabilities. Improved DRAM density and wafer productivity will reduce production costs and enhance profitability while increasing industry-wide DRAM supply. These developments represent a significant step toward CXMT's goal of becoming one of the world's largest DRAM manufacturers.