TSMC's 2nm and 3nm monthly production output projected to increase up to 22% by mid-2027, expanding AI chip supply as demand sustains.
TSMC is reportedly planning a major expansion of its 2nm and 3nm advanced process capacity to meet surging demand for artificial intelligence (AI) and high-performance computing (HPC) chips. According to supply chain sources, the company has communicated its 2027 expansion plans to partner suppliers for the first time, targeting a 2nm monthly capacity of 110,000 wafers by mid-2027—a roughly 22% increase from the 90,000 wafers projected at the end of 2026. Concurrently, 3nm monthly capacity is set to rise from 180,000 to 210,000 wafers, representing a gain of over 16%. When measured against the 120,000 to 130,000 wafers produced at the end of 2025, the 3nm capacity would expand by nearly 70% within an 18-month window. This aggressive scaling underscores how 3nm remains a primary shipment driver in the near term, even as 2nm enters volume production.
To bridge the substantial advanced process capacity gap, TSMC is simultaneously advancing production line construction and conversion across Taiwan, the United States, and Japan. Market sources indicate the company plans to add new fabrication buildings at the Tainan Science Park, while its second fabs in Arizona and Japan will also incorporate 3nm technology. Production of 3nm chips at the Arizona facility is targeted for the second half of 2027, though on-track progress could accelerate the timeline. Beyond greenfield construction, TSMC is flexibly converting select 5nm equipment at its Taiwan sites to 3nm capacity. Analysts attribute this shift to evolving demand in entry-level and mid-range smartphones, as well as weakening orders for mature nodes, prompting the company to concentrate resources on higher-margin advanced processes. Currently, TSMC has 18 fabs under construction or renovation globally, with expansion accelerating exponentially.
On the technology roadmap, TSMC’s advanced process cadence continues to draw intense industry scrutiny. The N2 family, featuring nanosheet architecture and a backside power rail design, is expected to begin contributing revenue in the second quarter of 2026. The A16 process, which incorporates Super Power Rail technology, is slated for volume production in the second half of 2026. Meanwhile, the A14 process—TSMC’s second-generation angstrom-class node—is progressing smoothly across production bases in Taichung and Hsinchu, targeting volume production in the third quarter of 2028, with subsequent plans to advance to the A10 node around 2030.
Against this backdrop of persistently rising demand, TSMC has substantially revised its 2026 capital expenditure upward to $60–64 billion (approximately NT$1.9–2 trillion), a significant increase from its initial $50 billion guidance. Approximately 70% to 80% of this budget will be allocated to N3 and N2 advanced process capacity expansion. During its second-quarter earnings call in July, management noted that order visibility from major customers and cloud service providers now extends through 2029–2030.
Beyond wafer manufacturing, the AI boom continues to drive demand for TSMC’s advanced packaging solutions. CoWoS technology serves as a critical link in the AI chip supply chain, and the company is evaluating further capacity expansion, potentially doubling output. Supply chain data indicates CoWoS monthly capacity could rise from approximately 130,000 wafers at the end of 2026 to 260,000 wafers by the end of 2028, with expansion concentrated at the Zhunan AP7 facility in Taiwan and the Arizona fab.
Analyst reports highlight TSMC’s competitive advantages in technology leadership and yield performance, forecasting USD revenue growth of over 40% in 2026. Post-tax earnings per share are projected at NT$106.46 for 2026, potentially climbing to NT$139.47 in 2027. Supported by this strong long-term earnings outlook, domestic institutional investors maintain a Buy rating with a target price of NT$3,200.
While TSMC scales aggressively, competitors are positioning themselves in parallel. Intel’s EMIB-T packaging capacity, measured in 12-inch CoWoS-equivalent wafers, is estimated to grow from 15,000 to 20,000 wafers per month in 2027, reaching 40,000 to 45,000 wafers in 2028. Industry sources note the architecture is particularly well-suited to the custom AI accelerator requirements of Google and Amazon. Additionally, MediaTek (2454.TW) has reportedly given Intel’s EMIB packaging technology a “very good” assessment, citing steadily improving yields. This development has fueled market speculation that Google may adopt EMIB for its TPU chip production. Nevertheless, TSMC’s leadership in advanced packaging remains difficult to challenge in the near term, particularly as CoWoS has become an indispensable supply chain component for AI chip leaders like Nvidia.
Regarding market rumors, TSMC has maintained its customary low-profile stance, stating it does not comment on speculation and emphasizing that all capacity-related disclosures are subject to official company announcements. However, the expansion notifications distributed to supply chain partners and the significant upward revision in capital expenditure signal a high degree of confidence in the medium- to long-term demand outlook for advanced processes.
| Process Node | End-2025 Monthly Capacity | End-2026 Monthly Capacity | Mid-2027 Monthly Capacity (Target) | End-2026 to Mid-2027 Growth |
|---|---|---|---|---|
| 2nm | — | 90,000 wafers | 110,000 wafers | ~22% |
| 3nm | 120,000–130,000 wafers | 180,000 wafers | 210,000 wafers | >16% |
*Note: The 2nm process entered volume production in 2026; therefore, no capacity data exists for the end of 2025.*
From a broader perspective, AI and high-performance computing have emerged as the core drivers of semiconductor industry growth. As the world’s leading supplier of advanced process technologies, TSMC’s expansion pace and technological advancement directly impact both its operational performance and the stability of the global AI chip supply chain. With 2nm volume production ramping, 3nm capacity continuing to scale, and the CoWoS packaging expansion plan progressing, TSMC’s dominance in advanced process technology is poised for further consolidation.