시장 분석에 따르면 중국의 첨단 메모리 제조 능력은 이제 CXMT, YMTC, XMC 간에 구조적으로 분할되어 있으며, 각사는 국내 저장 공급망의 고유한 세그먼트를 확보하고 있다.

According to researcher Schulz_Research, China’s semiconductor storage sector has evolved from a single-company narrative into a coordinated division of labor among three key players: CXMT focuses on DRAM wafer fabrication, YMTC handles NAND production while adding DRAM capabilities to its newest facility, and XMC—a foundry under YMTC’s control—manages the stacking integration for both companies’ chips. This operational split aligns with Beijing’s policy framework established in late December last year, which mandates that new fab approvals demonstrate at least 50% domestic equipment sourcing, with exemptions reserved solely for cases where no viable domestic alternatives exist. YMTC’s Wuhan Phase III facility is the first advanced storage project to clear this threshold and is scheduled to commence production later this year.

CXMT currently operates three 300mm DRAM fabs, each yielding approximately 100,000 wafers per month. Projections indicate output will climb to 350,000 wafers monthly by the end of 2026, with total capacity exceeding 600,000 wafers once all announced expansion projects are completed. YMTC’s initial two Wuhan facilities combine for a 200,000-wafer monthly capacity. Phase III is expected to contribute 50,000 wafers by 2027, ramping to full production at 100,000 wafers monthly, with plans underway to construct two additional fabs of comparable scale. Meanwhile, XMC operates two 12-inch facilities, each processing roughly 30,000 wafers, alongside an HBM packaging line capable of handling approximately 3,000 wafers per month.

In the broader market landscape, China currently accounts for roughly 10% of global DRAM bit supply. YMTC captured 14% of worldwide NAND bit shipments in the second quarter, while Chinese domestic demand absorbs approximately 30% of global storage output.

On the product front, CXMT has initiated mass production of DDR5 and LPDDR5 memory and intends to begin volume manufacturing of HBM3 this year, having already delivered samples to domestic AI hardware developers. To support these advanced packages, XMC has dedicated two years to developing HBM packaging infrastructure leveraging hybrid bonding techniques and YMTC’s stacking IP. The company continues to advance TSV technology to further refine its high-bandwidth memory capabilities.