Samsung unveils zHBM stacked memory architecture achieving 8X HBM5 performance improvement, announced at Flash Memory Summit 2026.

While SK hynix recently unveiled the HBF (High Bandwidth Flash) standard with SanDisk, Samsung is set to showcase its 3D memory and storage roadmap at FMS 2026, highlighting technologies such as zHBM and Z-NAND aimed at alleviating AI system bottlenecks. At FMS (Future of Memory and Storage) 2026—the world's largest memory and storage conference, running August 4–6—Samsung's zHBM is expected to take center stage as the successor to last year's z-NAND.

Samsung's next-generation interface system incorporating zHBM is expected to deliver approximately eight times the performance of HBM5. Using next-generation wafer bonding technology, zHBM can achieve more than 10 times the memory density of HBM5 while enhancing energy efficiency threefold and reducing thermal resistance by more than half. Unlike conventional planar designs, zHBM aims to achieve a fully 3D-stacked architecture by leveraging multi-wafer-to-wafer bonding technology, designed to support tens of thousands of I/O connections. According to Samsung Electronics CTO Song Jae-hyuk, the technology vertically stacks HBM directly on top of the GPU, replacing the conventional side-by-side layout to minimize data travel distance while significantly boosting bandwidth and power efficiency.

The concept of zHBM was first flagged in February at SEMICON Korea. Samsung's zHBM is a future memory architecture designed to succeed HBM4, featuring more than 4x higher bandwidth and 75% lower power consumption compared with next-generation HBM solutions.

In the NAND segment, Z-NAND is emerging as a key next-generation strategic product for Samsung. While data stored on SSDs had to pass through the CPU and DRAM before being accessed by GPUs, creating latency bottlenecks, Z-NAND is designed to address this limitation by minimizing latency and boosting I/O performance. Samsung has revived its Z-NAND ambitions in 2025, with the company's Memory executive vice president stating it aims to achieve up to a 15-fold performance improvement with Z-NAND while reducing power consumption by as much as 80% versus conventional NAND flash memory.

However, commercialization challenges remain. Samsung's Z-NAND previously gained attention for its ultra-low latency and high endurance, but its SLC-based architecture creates structural challenges, including higher cost per gigabyte and lower storage density, limiting broader adoption. Z-NAND could deliver ultra-low latency with read speeds approaching DRAM levels, but commercialization will depend on overcoming a key hurdle: costs estimated at 3–4 times that of conventional TLC NAND.