ChangXin Memory (CXMT) advances semiconductor process miniaturization using Deep-UV (DUV) lithography alone, circumventing the need for Extreme-UV (EUV) as China's domestic chip ecosystem accelerates.

Chinese DRAM manufacturer ChangXin Memory Technologies (CXMT) has begun mass-producing chips using a next-generation advanced process. With U.S.-led restrictions effectively blocking access to extreme ultraviolet (EUV) lithography systems, the company is scaling down its process nodes by combining deep ultraviolet (DUV) equipment with multipatterning technology. While DUV-based multipatterning faces clear limitations in process complexity, cost and yield, and Chinese efforts to develop indigenous EUV systems have yet to produce meaningful results, market observers note that these constraints are unlikely to limit broader growth in China's semiconductor industry. Chinese companies have made rapid advances in other semiconductor equipment segments, including etching, deposition, cleaning and back-end processing.

CXMT announced at the 2026 World Manufacturing Convention in Hefei, Anhui Province on September 20 that it had developed and begun mass production of a fifth-generation DRAM process. The process reduces the spacing between critical DRAM memory-cell structures to 11.95 nanometers and uses a multipatterning technique that divides circuit patterns into multiple DUV exposures. CXMT reports the process increases chips produced per wafer by at least 50% compared with the previous generation, with two 24-gigabit low-power DRAM (LPDDR5X) products entering mass production. An industry source cautioned that "the 50% figure disclosed by CXMT refers to the total number of chips produced per wafer and should not be interpreted as a 50% improvement in actual yield," but added that "if absolute DRAM production volumes increase, CXMT may gain additional supply capacity for products such as fourth-generation high-bandwidth memory (HBM3), where it has struggled to secure adequate yields."

CXMT turned to DUV-based multipatterning due to U.S.-led export restrictions on EUV lithography. Restrictions began in 2018–2019 under President Donald Trump, when the U.S. pressured the Dutch government to block export licenses allowing ASML, the world's sole EUV supplier, to ship to China. China has been unable to obtain EUV systems since 2019. The Biden administration introduced sweeping export controls in October 2022, restricting both U.S.-made equipment and technology and production support by U.S. persons. The Netherlands required government authorization for ASML's high-performance immersion DUV exports to China in September 2023, extended to lower-specification systems in September 2024. The U.S. strengthened its Foreign Direct Product rule in December 2024, extending export controls to foreign-made semiconductor equipment incorporating U.S. technology or components.

In conventional lithography, a complete circuit pattern is contained on a single mask and transferred to a wafer in one exposure. Multipatterning divides fine patterns into two or more components, exposing and etching them separately before combining into a final circuit. Techniques include litho-etch-litho-etch (LELE) and self-aligned double or quadruple patterning (SADP and SAQP). LELE exposes and etches an initial pattern before exposing and etching a second pattern between the first features. SADP and SAQP first create widely spaced reference lines called mandrels, then repeatedly deposit and etch thin spacer layers on both sides to double or quadruple line density.

However, multipatterning's limitations intensify as process geometries shrink. Exposure, deposition, etching and cleaning must be repeated multiple times per layer, substantially increasing process steps and production time. Nanometer-level alignment of each pattern becomes critical; minute variations in mandrel thickness or spacer deposition and etching accumulate, causing final patterns to deviate from their intended position. These problems drive lower yields and higher production costs.

China has devoted substantial resources to developing indigenous EUV systems. The Changchun Institute of Optics, Fine Mechanics and Physics (CIOMP), a Chinese Academy of Sciences affiliate, began developing EUV lithography technology in 2008 under the "02 Project," a major national science and technology initiative. In 2016, it announced a compact lithography optical system using a 13.5nm EUV light source that produced photoresist patterns with 32nm linewidth. The Institute of Optics and Electronics (IOE), another CAS affiliate in the project, secured technologies for vacuum systems, wafer and mask stages, vibration control and focus detection—early-stage research to localize optical, precision-motion and vacuum systems needed for commercial EUV equipment.

Efforts spread to the private sector. Shanghai Micro Electronics Equipment (SMEE), China's largest lithography equipment manufacturer, filed a patent for an "EUV radiation generator and lithography equipment" in March 2023, published in September 2024. Huawei filed patents covering mirrors and control technologies for EUV lithography systems in 2021 and an international patent for maskless EUV lithography technology using micromirrors in 2022. These filings target core technologies spanning EUV light sources, reflective optics and patterning methods. Reuters reported last December that "China completed a prototype of an indigenous EUV lithography system at a secure research facility in Shenzhen in January 2025 and began testing it." According to multiple sources, the system was developed by former ASML engineers through reverse engineering of ASML's EUV platform and occupies nearly an entire floor of the facility.

Shanghai Aishengna integrated domestic lithography development teams in 2026 to pursue DUV equipment production, targeting annual output of five systems, with plans to increase production to 20 systems annually by 2027.