SK hynix, Samsung, and Micron fighting for NVIDIA supply contracts for new 16-Hi HBM4 orders
Samsung, SK hynix, and Micron are competing to develop new 16-Hi HBM memory, as NVIDIA has requested supply of the chips for the second half of 2026.
16-Hi HBM has not been commercialized before, and it faces many technological hurdles, including DRAM stacking, which becomes far more complicated as the number of stacks increases. According to a new report from the Electronic Times, NVIDIA has reportedly asked domestic and foreign memory manufacturers to deliver 16-Hi HBM chips by Q4 2026.
SK hynix and Samsung Electronics in South Korea, along with US-based Micron, have all begun full-scale development work toward mass-production supply of 16-Hi HBM chips for NVIDIA. The outlet reports that no concrete contracts have been signed yet, and that discussions are ongoing internally about initial production volumes.
An industry official said: "Following the supply of 12-Hi HBM4, a request for 16-Hi supply has also been made, so we are establishing a very fast development schedule. Performance evaluation could begin as early as before the third quarter of next year."
12-Hi HBM4 is set to enter mass supply in early 2026, but development of the denser 16-Hi HBM4 chips has accelerated. Another senior industry official suggested the 16-Hi HBM product could be called HBM4E, adding: "It is likely that the product will be 16-Hi HBM4, but the generation or name could change depending on performance and mass production timing."
16-Hi HBM stacks are extremely complicated to manufacture. They represent the densest HBM stack configuration so far, with 12-Hi in production and 16-Hi in accelerated development. Even next-generation HBM5 is expected to top out at 16-Hi. 20-Hi and 24-Hi HBM stacks are not expected until HBM7, which is anticipated around 2035, while HBM8 is also expected to max out at 24-Hi.
The 16-Hi HBM chips being developed in 2026 would be an industry first, and observers say the technical challenges will be "formidable," with thin wafer thickness a particular concern. Existing 12-Hi HBM has a wafer thickness of about 50 micrometers (µm), and the report suggests this must be reduced to around 30µm to stack 16 layers.
The JEDEC (Joint Electron Device Engineering Council) thickness standard for HBM4 is 775µm, about 50µm thicker than the existing HBM3E standard of 725µm. This allowance was granted because thin HBM becomes harder to implement as layer counts rise. The prevailing view, however, is that JEDEC will not increase the thickness further for 16-Hi HBM, meaning more DRAM dies must fit within the same 775µm.
Samsung Electronics and Micron are currently using Thermal Compression Non-Conductive Film (TC-NCF) for the bonding process, while SK hynix uses Mass Reflow Molded Underfill (MR-MUF).
An industry official said: "The current bonding material thickness is around 10µm, and to stack more DRAM, this must be reduced to secure competitiveness. Dissipating the heat generated after bonding is also a challenge."