Xilinx launches Alveo U50 FPGA accelerator for data center compute, network, and storage workloads.

At the Flash Memory Summit currently underway at the Santa Clara Convention Center in Santa Clara, California, Xilinx unveiled the Alveo U50, a new member of its adaptable data center accelerator family. Built on the company's UltraScale+ FPGA architecture, the Alveo U50 targets scale-out and domain-specific acceleration of a multitude of data center workloads.

The Alveo U50 is the first half-height / half-length accelerator to offer support for PCI Express 4.0, which doubles the available bandwidth per lane over PCI Express 3.0 solutions. The card supports the CCIX interconnect and features 8GB of HBM2 (High Bandwidth Memory) with peak bandwidth of 460GB/s and 28MB of internal SRAM that offers 24TB/s of bandwidth. A single QSFP29 100GbE network interface supports 4x 10GbE, 4x 25GbE, 1x 40GbE or 1x 100GbE configurations. The Alveo U50 offers 872K LUTs (Look Up Tables), all within a 75W power envelope, and supports NVMe-oF solutions (NVM Express over Fabrics). Its form factor and low-power characteristics make it compatible with virtually any modern server, requiring no supplemental power.

"Ever-growing demands on the data center are pushing existing infrastructure to its limit, driving the need for adaptable solutions that can optimize performance across a broad range of workloads and extend the lifecycle of existing infrastructure, ultimately reducing TCO," said Salil Raje, executive vice president and general manager, Data Center Group, at Xilinx. "The new Alveo U50 brings an optimized form factor and unprecedented performance and adaptability to data center workloads, and we continue to build out solution stacks with a growing ecosystem of application partners to deliver previously unthinkable capabilities to a range of industries."

Xilinx claims the Alveo U50 can provide significant benefits across machine learning inference, video transcoding, data analytics, computational storage, electronic trading, and financial risk modeling. According to data provided by Xilinx, the Alveo U50 delivered 25X lower latency with 10X higher throughput than an NVIDIA Tesla T4 in speech translation and deep learning inference workloads. Running the TPC-H Query database benchmark, the Alveo U50 offered 4X higher throughput per hour than an Intel Xeon Platinum 8260 processor at significantly lower cost, and it delivered much lower latency and higher efficiency than Xeon and Xeon + Tesla configurations in electronic trading and financial modeling. A computational storage acceleration test showed 20X more compression/decompression throughput and >30% reduced cost per node when compared to CPU-only solutions.

The Xilinx Alveo U50 is sampling to OEMs now, with general availability slated for fall.