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Onsemi has unveiled its Embedded Power Platform architecture designed to increase power density within server racks.

Addresses critical thermal and efficiency constraints in high-density AI deployments, enabling more accelerators per rack without compromising reliability.
Trade pressSlicast · September 16, 2026 at 18:30 UTC · Global · Source: Data Center Dynamics
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US chipmaker Onsemi has unveiled its Embedded Power Platform (EPP), a new chip architecture designed to increase power density in AI data centers and other high-power applications. The platform utilizes the silicon wafer itself as an embedded package, integrating electrical, mechanical, and thermal design to help customers achieve higher power density and enhance AI system performance.

Speaking to DCD ahead of the announcement, Dinesh Ramanathan, SVP of corporate strategy at Onsemi, outlined the rapidly escalating power demands of modern data centers. He noted that while current server racks draw roughly 60kW, that figure is projected to climb to 200kW within two years and reach 1MW by the end of the decade. “The space in the rack isn't changing, but the amount of power that rack is going to end up consuming is increasing by a dramatic amount,” Ramanathan said. “So, if you have to support that and make sure that data center rack can consume the 1MW and give us the kind of AI capabilities that we're looking for, then we have to drive towards an increase in power density across that entire rack. If we can't increase the power density across the entire rack, we'll never be able to reach 1MW.”

On a fundamental level, EPP operates by creating a cavity within a silicon wafer and embedding the die directly inside. By treating the wafer as the package, the architecture enables silicon, silicon carbide, and vertical gallium nitride to be seamlessly interconnected within a highly integrated wafer-level design. This approach also consolidates multiple components—including FETs, drivers, and controllers—into a single package co-optimized for electrical, thermal, and mechanical performance. In an early EPP-based solid-state circuit-breaker prototype, Onsemi reported the solution was approximately 50 percent smaller and 20 percent cooler than conventional designs.

The platform leverages Onsemi’s standard 12-inch silicon wafer manufacturing infrastructure, alongside mature semiconductor design tools, wafer-level production processes, advanced simulation capabilities, and power system integration expertise. “By reducing packaging overhead and using the full EPP footprint to conduct heat, EPP can support more compact power systems, improve thermal management and enable greater power density in AI infrastructure,” the company stated.

Onsemi has already secured a partnership with Subaru for EPP deployment, granting the automaker early access to engineering samples, simulation models, and technical expertise. Ramanathan confirmed the company is also collaborating with an unnamed industrial firm and an AI data center operator. “We have shown [these customers] what the technology can do, and we're working towards getting this product into revenue in the 2027 time frame, so we're sampling our customers this year,” he said. “The expectation is that in Q1, this technology will be qualified, and then made generally available for any of our customers to take to market.”

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Onsemi has unveiled its Embedded Power… · Slicast