TSMC 임원은 집적 시스템이 AI 붐을 주도할 것이라고 밝히며, 칩렛 및 고급 패키징 아키텍처로의 전환을 강조했습니다.

The next phase of artificial intelligence growth will be driven by the large-scale deployment of integrated computing systems as the industry enters the “true industrialization of AI,” said April Li (李湘), AI and high-performance computing business development director at Taiwan Semiconductor Manufacturing Co (TSMC, 台積電). Speaking yesterday in a keynote address at the Semicon Taiwan IC forum in Taipei, Li noted that AI agents are increasingly moving into enterprise workflows while investment in specialized data centers and physical AI accelerates. “In this new era, market leaders will not be the ones who simply make better models, but those who build the most integrated systems,” she said. Rather than relying solely on advances in individual chips or models, future AI infrastructure will require the integration of computing, memory, interconnects, storage, and power management across chips, server racks, and entire data centers.

This architectural shift is being propelled by soaring demand for AI inference—the process of using trained models to respond to requests and perform tasks. Global inference token volume has increased approximately 500-fold since 2022, and more complex reasoning and agentic AI systems consume significantly more tokens than conventional one-shot queries. “Inference is no longer a low-overhead task,” Li said, adding that it is becoming the dominant driver of system-level expansion as AI agents operate continuously in the background. These growing workloads are placing intense pressure on four key areas: logic scaling, interconnect efficiency, memory performance, and power delivery and cooling. Data movement alone can account for up to 60 percent of system activity in typical workloads, leaving accelerators operating at below 40 percent utilization. Furthermore, AI packages may contain more than 1 trillion transistors by 2030, making multi-die architecture and heterogeneous integration essential.

To address these constraints, TSMC is developing technologies spanning advanced logic, packaging, and optical interconnects. Li highlighted the company’s 3DFabric platform, which incorporates system-on-integrated-chips (SoIC) 3D stacking and chip-on-wafer-on-substrate advanced packaging, alongside its compact universal photonic engine platform designed for high-speed optical data transmission. TSMC is also working to enhance high-bandwidth memory performance by applying advanced logic technology to HBM base dies. During a question-and-answer session, Li emphasized that TSMC must cultivate an in-depth understanding of the supply chain “from silicon to the data center to the token” and collaborate with ecosystem partners to validate technologies as early as possible across that entire chain. This reflects how TSMC’s role has expanded well beyond manufacturing individual chips. “Gone are the days when we can just ship wafers across the fence,” Li said.

Broader infrastructure developments underscore the industry’s rapid scaling. In China’s hilly Guizhou Province, a cluster of European-style buildings complete with a clock tower and multi-arched bridge emits a low, permanent hum—a clear indicator of its identity as tech giant Huawei’s largest data center. While unique in design, the town-like complex aligns with a broader government strategy that has relocated much of the digital infrastructure for China’s breakneck AI development from the eastern seaboard to the country’s less populated, rural west. Dozens of such facilities have been constructed in the southwestern province over the past few years, with the build-out continuing. Meanwhile, demand for advanced compute hardware remains fierce. Indian AI infrastructure company AM Intelligence has ordered 9,000 Nvidia Corp Vera Rubin systems, positioning itself among the first adopters of the platform in Asia. The Hyderabad-based firm stated that servers equipped with the rack-scale systems will come online next year in southern India, serving major cloud service providers, AI labs, and organizations developing homegrown Indian AI models. Supplies of high-end Nvidia compute clusters remain tight amid sustained demand from data centers and hyperscalers including Microsoft Corp, Alphabet Inc’s Google, and Amazon.com Inc for AI model training.

The focus on next-generation connectivity and packaging was further highlighted at the upcoming Semicon Taiwan trade show. Organized by SEMI, the event opens Wednesday and runs through Friday at the Taipei Nangang Exhibition Center, with technical forums beginning today. SEMI projects record attendance, with more than 1,300 exhibitors from 65 countries occupying 4,300 booths and drawing over 100,000 attendees. Silicon photonics and copackaged optics (CPO)—technologies viewed as critical to meeting surging AI bandwidth demands—will be among the main themes, with optical interconnects underpinning AI infrastructure expected to draw significant attention. On the packaging front, chip packaging service provider Powertech Technology Inc (力成科技) announced that its advanced fan-out panel-level packaging (FOPLP) production line has secured a 100 percent utilization rate through 2030, ahead of its scheduled volume production next year. After six years of development, the company made its first public unveiling of FOPLP capabilities during the announcement. Chairman Tsai Du-kung (蔡篤恭) expressed strong confidence in the long-term order pipeline, noting that robust market traction has eliminated client acquisition concerns. “Our capacity has been fully booked by two major customers. Customers are not an issue through 2030,” he told reporters at the company’s Hsinchu plant.