Intel is reportedly capturing increased advanced packaging orders as surging AI demand strains TSMC CoWoS capacity.

Soaring demand for TSMC’s CoWoS (chip-on-wafer-on-substrate) packaging technology may be eroding its market share to Intel, according to data from SemiAnalysis Chipbook. CoWoS is a critical step in AI chip manufacturing that integrates multiple GPUs and memory chips into a single package for deployment in data centers or other computing infrastructure.

While TSMC’s highly optimized manufacturing operations have prevented shortages of global AI computing chips—primarily GPUs—despite multi-billion-dollar industry expansions, other semiconductor segments face significant constraints. Packaging production and memory chips remain indispensable bottlenecks for modern AI systems.

Packaging integrates computing and memory components, while memory chips store data during computational processing. This memory shortage has dramatically shifted industry dynamics, notably boosting South Korean manufacturer SK hynix and triggering successful worker protests at Samsung to secure bonuses amid soaring profits.

Packaging constraints were among the earliest bottlenecks TSMC identified at the onset of the current AI boom. As early as 2023, the company expanded its packaging capacity to 15,000 wafers per month. Despite repeated capacity increases, TSMC continues to struggle with AI-driven demand. A July report from Commercial Times indicated that unmet packaging orders were increasingly diverting to Intel and other manufacturers.

That claim is now supported by export data from SemiAnalysis Chipbook, which tracks chip shipments from South Korea. The data shows $1.3 billion in chips destined for Malaysia, while shipments to Taiwan have fallen below the $3 billion threshold. These are high-bandwidth memory (HBM) products commonly used in AI accelerators. Given that Intel is the sole major chip manufacturer operating in Malaysia, these shipments are almost certainly routed to its facilities.

Intel’s primary advanced packaging solutions, EMIB and EMIB-T, are typically deployed for power-efficient designs. In contrast, TSMC’s CoWoS architecture offers higher interconnect density, making it the industry standard for high-power chips such as those produced by NVIDIA.

Ramish is a seasoned technology writer and editor with more than a decade of experience, specializing in semiconductor fabrication and market analysis. With a background in finance and supply chain management—via a bachelor’s degree in Finance and a MicroMasters in Supply Chain Management from MIT—he combines financial rigor with deep industry insight to deliver accurate and authoritative coverage.