Nvidia Vera Rubin HBM4: Jensen Huang Confirms All Three Suppliers in Production for Q3 Ship
Jensen Huang stepped off his plane at Seoul's Gimpo business aviation center on Friday with the most definitive supply-chain signal of the AI infrastructure cycle: all three of the world's major memory makers are simultaneously qualified, in active production, and competing to deliver high-bandwidth memory 4 (HBM4) chips for Nvidia's Vera Rubin AI server platform, with the first systems scheduled to ship in Q3 2026.
"All three vendors have been qualified," Huang told reporters. "All three vendors are in production, and they're all racing to support Vera Rubin." This confirmation ended months of supply-chain speculation and marked the first time Huang publicly acknowledged all three vendors — Samsung Electronics, SK hynix, and Micron Technology — as cleared for HBM4 delivery on the same platform.
Vera Rubin entered full production following Huang's GTC Taipei keynote on June 1, after Nvidia announced the platform would begin customer shipments in Q3 2026. Huang framed the second half of this year as a major production ramp, significantly larger than the first half, with next year growing still further — requiring close coordination across DRAM and HBM supply chains.
**The Technology Behind HBM4**
HBM4 represents a structural break from its predecessor, not merely an incremental speed upgrade. Under the JEDEC JESD270-4 standard, HBM4 doubles the memory interface width from 1,024 bits — the figure in HBM3E chips powering today's Grace Blackwell servers — to 2,048 bits, while increasing independent data channels from 16 to 32. The wider bus allows HBM4 to deliver at least 2 terabytes per second of bandwidth per memory stack at the JEDEC baseline. Samsung's production HBM4, which uses a 4-nanometer logic die and 12-high DRAM stacking, operates at 11.7 gigabits per second per pin and reaches 3.3 terabytes per second — well above specification.
The architecture separates command and data buses, reducing latency during the simultaneous multi-channel memory operations that dominate large-scale AI training and inference. Each Vera Rubin NVL72 rack carries 20.7 terabytes of HBM4 memory delivering 1.6 petabytes per second of aggregate bandwidth — a 2.7-fold improvement over the 8 terabytes per second that HBM3E provided in Grace Blackwell systems.
The manufacturing process is also the most significant constraint. HBM4 stacks DRAM dies vertically using through-silicon vias — microscopic copper pillars that transfer data between layers without signal-integrity losses of conventional board traces. The 12-high stack that Samsung and SK hynix are currently shipping requires each silicon die to be thinned to approximately 50 micrometers. The 16-high stacks both companies are racing to qualify for Vera Rubin Ultra, expected in late 2027, require thinning to approximately 30 micrometers — about half the diameter of a human hair — while keeping the entire package within a JEDEC-mandated height limit of approximately 720 micrometers to fit within standard CoWoS silicon interposer packaging.
**Vera Rubin Versus Grace Blackwell**
Vera Rubin is not a faster version of Nvidia's Grace Blackwell; it is a different class of system, built specifically for what Nvidia calls "agentic AI" workloads — tasks where a single user prompt triggers hundreds or thousands of autonomous reasoning, retrieval, and tool-use steps before a response is returned.
Each NVL72 rack pairs 72 Rubin GPUs with 36 Vera CPUs in a liquid-cooled rack-scale system. Each Rubin GPU carries 336 billion transistors, delivers 50 petaflops of NVFP4 inference performance, and interconnects via NVLink 6, providing 3.6 terabytes per second of all-to-all scale-up bandwidth per GPU — more than double the NVLink 5 bandwidth in Blackwell. Nvidia claims 10 times higher inference throughput per watt versus Grace Blackwell, 10 times lower cost per inference token, and one-quarter the number of GPUs needed to train large mixture-of-experts models. For hyperscalers running inference at scale, where electricity costs for a single rack can exceed two million dollars per year, the efficiency gain translates directly into capital planning decisions. Huang confirmed Grace Blackwell systems are deploying successfully as Vera Rubin ramps, positioning the two generations as overlapping supply windows rather than sequential replacements.
**The Three-Way Production Race**
Industry analysts estimate SK hynix holds roughly 60 to 70 percent of the HBM4 volume allocated to Vera Rubin, with Samsung at approximately 25 to 30 percent and Micron supplying the remainder — though Nvidia has not disclosed official figures. These estimates reflect a competitive dynamic shaped by qualification history: SK hynix has been Nvidia's primary HBM supplier across prior generations, holding approximately 62 percent of the overall HBM market as of mid-2025.
Samsung's position is more complex. The company was first to begin HBM4 mass production, announcing commercial shipments on February 12, 2026, using its 4-nanometer logic die and 12-high stacking to reach 3.3 terabytes per second — the fastest HBM4 specification publicly announced. Samsung is also the first to have shipped HBM4E samples, the enhanced next-generation standard targeting 3.6 terabytes per second at 16 gigabits per second, positioning it for Vera Rubin Ultra in 2027.
SK hynix employs Mass Reflow Molded Underfill, a bonding approach that has proven easier to scale than Samsung's hybrid bonding, which eliminates traditional solder microbumps between layers to reduce electrical resistance and improve signal density. Hybrid bonding offers structural advantages for denser stacks but has faced early yield challenges — illustrating why Samsung's technological edge does not automatically translate into a larger production allocation.
Micron, the smallest of the three by HBM market share, has emerged as a critical third supplier. The company committed to selling out its HBM production capacity for 2026 and previously forecast an HBM annualized revenue run-rate approaching eight billion dollars.
**Seoul R&D Center, Robotics, and RTX Spark**
Huang's Seoul visit extended beyond supply-chain coordination. He announced that Nvidia is hiring for a research and development center in Seoul — with plans to build a physical site once staffing reaches sufficient scale — describing Korea's manufacturing strength as the foundation for a major physical AI partnership agenda. The center will focus on physical AI and robotics research, with Nvidia's Jetson Thor robotics processor — currently deployed by Hyundai Motor Group and LG — as a key platform for Korean industrial deployment. Huang told reporters that robotics would be Korea's next major growth sector, citing the country's combination of advanced manufacturing and AI capability as uniquely suited for the physical AI era.
His evening included dinner with the chairs of SK Group, LG Group, and Naver at a casual pork-belly barbecue restaurant in Seoul — the second such informal gathering in seven months, following his fried-chicken-and-beer session in Korea last October.
Earlier in the day, Huang visited T1 Base Camp, an esports café in Seoul's Mapo district, to meet Lee "Faker" Sang-hyeok — the six-time League of Legends World Champion — and hand him a personally signed GeForce RTX 5090 graphics card. The occasion served as a platform introduction for RTX Spark, Nvidia's new AI notebook superchip unveiled at Computex.
RTX Spark is a 70-billion-transistor system-on-chip built on TSMC's 3-nanometer process, fusing a 20-core Grace Arm CPU and a Blackwell GPU carrying 6,144 CUDA cores and fifth-generation Tensor Cores capable of 1 petaflop of FP4 AI performance. The chip connects the CPU and GPU over NVLink-C2C at 600 gigabytes per second — approximately five times the bandwidth of PCIe Gen 5 — with 128 gigabytes of unified LPDDR5X memory at 300 gigabytes per second. That unified memory pool eliminates the data-transfer bottleneck that occurs when a discrete GPU communicates with a CPU over a separate bus, enabling the platform to run large AI workloads and on-device agents without relying on a cloud connection. Huang described it as the first fundamental redesign of the PC in four decades: a laptop platform built from the ground up for an on-device AI agent that acts as a personal assistant rather than a passive tool.
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