NVIDIA is deploying its Vera CPU across electronic design automation workflows with Cadence and Synopsys, achieving up t
The complexity of modern chip design continues to grow as engineering teams develop increasingly sophisticated CPUs, GPUs and AI systems. To meet this challenge, NVIDIA is collaborating with industry leaders Cadence and Synopsys to optimize critical electronic design automation applications for the NVIDIA Vera CPU. NVIDIA is now deploying Vera across EDA workflows used to develop its next generation of CPUs and GPUs, demonstrating how high-performance CPU architecture can accelerate some of the industry's most demanding engineering workloads.
What is at stake is the pace of chip production and the tempo of industry technologies that benefit from boosted EDA workloads. Simulation, verification and implementation technologies play a central role in semiconductor development. Long before a chip reaches manufacturing, engineers spend years validating behavior, identifying corner cases and refining designs through thousands of iterations.
While GPUs and AI have accelerated many aspects of chip design, several critical EDA workloads remain heavily dependent on CPU performance. Logic simulation, formal verification and portions of digital implementation depend on fast individual cores, efficient memory systems and strong overall throughput. CPU architecture is therefore an important factor in determining how quickly engineering teams can validate designs, explore alternatives and move products toward tapeout.
NVIDIA's initial testing includes several leading EDA applications, with results highlighting Vera's ability to accelerate two of the most compute-intensive stages of modern chip design. Cadence Jasper, a formal verification platform, uses smart proof technology and machine learning to find and fix bugs and improve verification productivity early in the design cycle. Synopsys VCS is a high-performance functional verification solution used to simulate and validate complex chip designs before fabrication. Both applications showed up to 1.5x higher performance on selected workloads.
Vera combines 88 custom NVIDIA Olympus CPU cores with a high-efficiency LPDDR5X memory subsystem and second generation NVIDIA Scalable Coherent Fabric designed to deliver strong per-core performance, high memory bandwidth and consistent low latency. These capabilities are particularly important for workloads that mix latency-sensitive jobs with large-scale regression testing. Faster execution can shorten individual verification runs, while greater throughput enables engineers to evaluate more design alternatives and complete more validation within the same development window.
NVIDIA is deploying Vera throughout the EDA workflows used to create future NVIDIA processors and plans to build on Vera with the next-generation Rosa CPU, powered by the NVIDIA Rigel core, while continuing to optimize leading EDA applications across its CPU roadmap. By using NVIDIA CPUs to help design future NVIDIA CPUs and GPUs, the company is creating a continuous feedback loop between silicon design, software optimization and systems engineering, with each generation helping build the next.