Flex Logix releases edge AI inference benchmarks with cost-effective price/performance metrics.

Flex Logix Technologies announced real-world benchmarks for its InferX X1 edge inference co-processor, demonstrating significant advantages over Nvidia's Tesla T4 and Xavier NX across multiple performance metrics. The InferX X1 achieves these results with remarkably compact dimensions: a die size that is 1/7th the area of Nvidia's Xavier NX and 1/11th the area of Nvidia's Tesla T4. Despite its significantly smaller footprint, the InferX X1 delivers latency on YOLOv3, an open-source model widely adopted by customers, that is similar to the Xavier NX, while outperforming both competitors substantially on real customer models, achieving speeds as much as 10x faster in one case.

The price-to-performance advantage proves even more dramatic when measured by streaming throughput divided by die size. The InferX X1 delivers 2-10x better performance than the Tesla T4 and 10-30x better than the Xavier NX by this metric. Geoff Tate, CEO and co-founder of Flex Logix, emphasized the importance of model-specific testing: "Customers expect that they can use performance on ResNet-50 to compare alternatives. These benchmarks demonstrate that the relative performance of an inference accelerator on one model does not apply to all models. Customers should really be asking each vendor they evaluate to benchmark the model that they will use to find out the performance they will experience."

The InferX X1 is built on Flex Logix's nnMAX architecture, featuring 4 tiles with 4K MACs and 8MB L2 SRAM, connected to a single x32 LPDDR4 DRAM interface. The chip connects to the host processor via four lanes of PCIe Gen3, with an alternative x32 GPIO link available for hosts without PCIe capability. The system is programmable using TensorFlow Lite and ONNX, with a performance modeler already available, and two X1 units can operate together to increase throughput up to 2x. The InferX X1 was completing final design checks with tape-out expected soon and sampling anticipated in Q3 2020, initially available both as a standalone chip and as a PCIe board. The solution is optimized for edge deployment requirements, delivering throughput comparable to data center boards costing thousands of dollars while operating at single-digit wattage and a significantly lower price point.