Oracle is renewing 4-year-old GPU inventory at a 20% premium pricing, signaling strong HBM-class demand expansion across major cloud vendors.

AI infrastructure investment shows no signs of cooling. Data center GPU supply has tripled, and even legacy equipment over four years old is being re-contracted at 20% higher prices. This excess demand is rapidly reshaping the HBM (High Bandwidth Memory) market. Demand, once concentrated among GPU manufacturers like Nvidia, is now expanding to Big Tech companies developing their own AI chips, creating new supply opportunities for Samsung Electronics and SK Hynix.

Oracle announced during its fiscal 2027 first-quarter earnings call on September 10 that all GPU capacity coming up for renewal was re-contracted or resold at prices 20% above prior agreements. The majority involved legacy GPUs deployed more than four years ago. During the same period, Oracle supplied 850 MW of capacity—more than 300,000 GPUs—tripling volume quarter-over-quarter while achieving 97.9% utilization.

Remaining performance obligations disclosed alongside earnings totaled $664 billion, up $209 billion year-over-year. New AI cloud contracts signed during the quarter alone exceeded $30 billion, with roughly half expected to be recognized as revenue within the next 36 months. Oracle also raised its fiscal 2027 revenue outlook to $90 billion or higher.

That even legacy GPUs command premium prices despite significantly expanded supply underscores the strength of AI computing demand across both latest-generation and older products. Industry observers view this not as temporary but as a structural expansion of AI infrastructure investment.

**HBM Customers Diversify Beyond GPU Makers**

Strong AI computing demand is translating directly into customer diversification in the HBM market. Beyond traditional GPU manufacturers like Nvidia, global Big Tech players—Meta, Microsoft, and OpenAI—have entered ASIC (application-specific integrated circuit) development en masse. Per-chip HBM capacity is rising rapidly as well.

Meta's next-generation MTIA 400 is reported to increase HBM3E capacity from 216 GB to 288 GB. AMD's MI455X is expected to adopt HBM4 with 12-high 432 GB configuration, boosting capacity by 50% over its predecessor. Greater per-chip memory capacity drives proportionally higher per-customer HBM demand.

HBM customer diversification presents opportunities for South Korean semiconductor companies to expand their customer base. Samsung Electronics is receiving HBM supply collaboration requests from next-generation ASIC-based hyperscalers designing their own AI chips. With HBM4, the custom HBM market—where customer-designed logic can be applied to the base die—is gaining momentum, making tailored responses to each customer's requirements increasingly critical. Samsung is expanding HBM4 production capacity accordingly.

SK Hynix, the current HBM market leader, is also positioned to benefit from customer diversification. As more custom AI chips adopt HBM and per-chip capacity rises, the customer base expands from traditional GPU makers to Big Tech, amplifying per-customer demand. SK Hynix is broadening its capabilities beyond standard product supply to provide custom HBM solutions tailored to individual companies' AI architectures. Mirae Asset Securities projects that HBM capacity expansion and increased adoption in custom AI chips will drive further customer diversification, strengthening SK Hynix's market position.

**Micron Pursues a Three-Way Race**

The HBM competitive landscape is shifting. Micron plans to raise HBM production capacity to approximately 100,000 wafers per month by year-end, nearly doubling from last year's 40,000–50,000 wafers per month. With AI semiconductor market growth accelerating and HBM supply shortages persisting, Micron aims to leverage volume to compete with Samsung Electronics and SK Hynix.

Micron is already establishing a presence in next-generation HBM4. In March, the company began volume shipments of 12-high 36 GB HBM4 for Nvidia's Vera Rubin platform and has supplied samples of 16-high 48 GB HBM4 to customers. Industry observers expect Micron's HBM4 12-high product mix to rise from 20–30% of total HBM output earlier this year to as much as 50% by year-end.

According to Counterpoint Research, SK Hynix maintained the No. 1 position in the global HBM market in Q2 2026 with 50% revenue share. Samsung Electronics significantly increased its share from 21% in Q1 to 33% in Q2. Micron, in third place, saw its share decline to 18% from 21%.

Compared with a year ago, the ranking structure is shifting notably. SK Hynix fell 14 percentage points from 64% to 50%, while Samsung Electronics more than doubled from 15% to 33%. Samsung is expected to gradually increase its share as HBM4 shipments ramp.

However, HBM market share is not determined by production capacity alone. HBM involves vertically stacking multiple DRAM dies, and yield, stacking technology, thermal and power efficiency, and product reliability all matter critically. Suppliers must also pass quality certification from key customers like Nvidia to increase shipment volumes. Even with secured production capacity, failing to reliably supply customers at consistent quality makes market share gains difficult.

Industry estimates place Samsung Electronics' and SK Hynix's HBM production capacity at approximately 150,000–200,000 wafers per month each. Even at 100,000 wafers per month, Micron faces a significant gap with the two leaders. A semiconductor industry source stated, "HBM is not a market where increasing production capacity alone translates directly into revenue. Ultimately, what matters is whether you can reliably supply the products customers want at consistent yield and quality." The source added, "If production capacity expansion is accompanied by stabilized HBM4 supply, a three-way competitive race involving Micron alongside SK Hynix and Samsung Electronics could begin in earnest."

**Substrate Market Expands with Larger AI Chips**

As AI semiconductors grow more powerful and complex, the package substrates supporting them are expanding correspondingly. Multiple chips—GPUs from Nvidia and AMD, HBM from Samsung Electronics and SK Hynix—must connect within a single package, making technologies that increase substrate area, layer count, and circuit density increasingly critical.

Samsung Electro-Mechanics and LG Innotek showcased next-generation substrate technologies at the KPCA Show 2026 in Incheon on September 9–11. Samsung Electro-Mechanics' headline offering was its 2.1-dimensional (2.1D) package substrate. The currently dominant 2.5-dimensional (2.5D) approach mounts GPUs and HBM on a large silicon interposer. As semiconductor chips grow larger, the interposer must expand proportionally, driving up costs.

The de facto standard for 2.5D packaging is TSMC's CoWoS (Chip on Wafer on Substrate), which places GPUs and HBM side by side on a silicon interposer. Most AI chips, including Nvidia's accelerators, go through this process. TSMC Chairman C.C. Wei stated during the company's July 2026 earnings call that advanced packaging capacity still cannot keep up with demand and welcomed alternative packaging technologies from other players. This backdrop explains growing interest in 2.1D-class technologies that reduce costs without large interposers.

Samsung Electro-Mechanics is developing "bridge embedding"—inserting small silicon bridges only where needed within the substrate—along with methods for creating fine redistribution layers (RDL) directly on the substrate. Bridge embedding aligns with Intel's EMIB technology. Intel is expanding adoption of its next-generation EMIB-T, which adds through-silicon vias (TSV) to existing EMIB. Google is also reported to adopt EMIB-T in its next-generation AI accelerator in the second half of next year. Japanese suppliers including Ibiden and Shinko Electric [text cuts off].