Critical DRAM and HBM4e memory supply constraints are forcing major AI chipmakers to reduce memory specifications in their designs.

DRAM supply will remain tight through 2027, with uncertainty persisting over memory suppliers' HBM4e validation timelines. These constraints are prompting AI chip vendors to scale back the HBM configurations of their next-generation products, according to TrendForce.

Since the third quarter of 2026, NVIDIA has expanded its evaluation of the Rubin Ultra's HBM configuration beyond its original 12-Hi HBM4e design to include 8-Hi HBM4e, 12-Hi HBM4, and 8-Hi HBM4 alternatives. The final specification remains undetermined. Beyond NVIDIA, several cloud service providers are also evaluating lower HBM capacities for their next-generation in-house AI ASICs.

Recent memory shortages have already prompted adjustments to AI chip memory specifications across the industry. During the first half of 2026, cloud service providers and server OEMs reduced RDIMM capacities for server configurations. More recently, NVIDIA halved the SOCAMM capacity of its next-generation Vera Rubin Superchip modules, determining that LPDDR5X supply constraints are likely to persist through 2027.

NVIDIA maintained 12-Hi HBM4e as the baseline design for the Rubin Ultra from 2025 through the first half of 2026. However, beginning in early Q3 2026, the company initiated evaluation of lower-specification alternatives, driven by two principal constraints. First, the overall DRAM shortage projected for 2027 will limit wafer capacity that memory suppliers can allocate to HBM production. Second, uncertainties remain regarding the validation schedule and production yield ramp-up for 12-Hi HBM4e.

NVIDIA's primary objective for the Rubin Ultra generation is to increase I/O speed; expanding GPU shipment volume remains secondary. Should NVIDIA scale back its HBM specifications, this would occur through reducing the number of DRAM stack layers. Whether HBM4e completes validation and enters mass production on schedule will determine whether Rubin Ultra's I/O speed rises from the previous generation's 8–11.7 Gbps to 14–16 Gbps, or reaches only 11–12 Gbps through HBM4 design optimization.

Within any given generation, the number of DRAM stack layers determines the trade-off between HBM capacity per GPU and total GPU shipment volume. TrendForce notes that the final configuration will also depend on wafer allocation decisions by memory suppliers.

From a supply-demand perspective, HBM bit shipments are projected to grow 50–60% year-over-year in 2027, which will remain insufficient to match demand growth. HBM suppliers are expected to retain pricing power throughout 2027 under these supply-constrained conditions, with significant price increases widely anticipated across the industry. Facing both limited HBM supply and higher procurement costs, AI chip vendors have increased incentive to adopt lower-capacity HBM configurations.