연구진은 통계적 분석을 근거로, DeepSeek, Kimi 등 중국 AI 모델이 수출 통제 대상인 Nvidia Blackwell GPU로 학습되었다고 주장하고 있다.

U.S. trade controls barring the export of Nvidia and AMD high-end AI accelerator chips to China have taken several twists recently. Jensen Huang's affairs aside, it is an open secret in the industry that Nvidia's Blackwell silicon finds its way into China, whether physically or virtually. Independent research outfit UnemploymentLabs has now produced strong evidence that these chips were used to train open-weight Chinese AI models, including DeepSeek V4, Kimi K3.1, MiniMax-M3, and Ling-3.1-Flash.

The researchers are careful to hedge their findings. Their math checks out, but it does not reveal where the chips were located, how they were accessed, or prove that export controls were broken. As far as we can tell, it is currently not illegal for Chinese companies to rent Blackwell hardware abroad. Even as Nvidia's grip tightens, U.S. companies are not strictly prohibited from doing so either, as evidenced by the recent Tencent-Oracle deal.

The identification method is limited to models with open weights and depends on the hardware and software stacks used for training. Still, it is both clever and simple, much like the Egg of Columbus.

Some base facts come first. Different AI accelerator families have unique counts of shader modules (SMs), which are marginally analogous to CPU cores. Nvidia's Hopper chips have 132, Blackwell B-series chips have 148, and Blackwell GB chips come with 152. Second, while there is more than one software stack for training AI models, PyTorch and its CUDA-aware companions are by far the most widely used on Nvidia's hardware.

Training begins with initializing the model's weights, which determine how strongly the model considers each individual input. In modern LLM architectures, initialization includes a randomization step in which weight values are adjusted plus or minus pseudo-randomly using cuRAND. The randomness is controlled: a seed starting value produces the same adjustment figures every time.

Doing this for an entire model requires a great deal of computation, so the process is spread across all the SMs and further subdivided into threads. For large weight sets, the thread count per SM is 2,048 for Blackwell and Hopper silicon, a figure that is presumably carefully chosen and optimized.

The researchers repeated a facsimile of the initialization process using the same chips, software, and thread counts. Using relatively simple statistical analysis, they found that the final statistical distribution of weight values precisely matched that of DeepSeek, Kimi, and the other models. As a test, they changed the SM and thread counts, and, as predicted, the correlation completely broke down.

This allowed them to identify the family of Blackwell or Hopper chip used for each model and, eventually, to estimate the approximate number of cards used. They cannot, however, pinpoint the exact variant that produced the weights. The analysis depends only on initialization layout counts, meaning SM count and usage pattern, and not on VRAM capacity, memory bandwidth, or other characteristics that distinguish individual cards.

What about AMD cards like the MI300X, or other silicon with a high enough SM count running the same software stack? The scientists say it is not impossible that an AMD card could be configured to appear as two groups of 152 or 148 shaders, although they see little reason anyone would do so. Nevertheless, for DeepSeek V4, they also ruled out that possibility by analyzing the actual weight values themselves, and found that AMD cards still did not produce the same weight value pattern.