트렌드포스, 2027년 DRAM 공급 부족 지속 전망…엔비디아, 루빈 울트라용 HBM 구성 축소

According to TrendForce’s latest memory industry research, DRAM supply will remain constrained through 2027, with ongoing uncertainty surrounding memory suppliers’ HBM4e validation timelines. These combined constraints are prompting AI chip vendors to scale back the HBM configurations of their next-generation products.

Since the third quarter of 2026, NVIDIA has expanded its evaluation of the Rubin Ultra’s HBM configuration beyond its original 12-Hi HBM4e design. The company is now also assessing 8-Hi HBM4e, 12-Hi HBM4, and 8-Hi HBM4 alternatives, though a final specification has yet to be determined. Alongside NVIDIA, several cloud service providers (CSPs) are similarly evaluating reduced HBM capacities for their next-generation in-house AI ASICs.

TrendForce notes that recent memory shortages have already triggered multiple adjustments to AI chip memory specifications. During the first half of 2026, CSPs and server OEMs reduced RDIMM capacities across server configurations. More recently, NVIDIA decided to halve the SOCAMM capacity of its next-generation Vera Rubin Superchip modules after determining that LPDDR5X supply constraints are likely to persist through 2027.

From 2025 through the first half of 2026, NVIDIA maintained 12-Hi HBM4e as the baseline design for the Rubin Ultra. However, beginning in early Q3 2026, the company shifted toward evaluating lower-specification alternatives. This pivot is driven primarily by two supply-side constraints: first, the anticipated overall DRAM shortage in 2027 will restrict the wafer capacity memory suppliers can allocate to HBM production; second, significant uncertainties remain regarding the validation schedule and production yield ramp-up for 12-Hi HBM4e.

TrendForce emphasizes that NVIDIA’s primary objective for the Rubin Ultra generation is to increase I/O speed, while expanding GPU shipment volume remains a secondary priority. Should NVIDIA ultimately decide to scale back its HBM specifications, the reduction will most likely involve decreasing the number of DRAM stack layers.

Whether HBM4e completes validation and enters mass production on schedule will dictate whether the Rubin Ultra can raise its I/O speed from the previous-generation Rubin’s 8–11.7 Gbps to 14–16 Gbps, or whether it will only achieve 11–12 Gbps through HBM4 design optimization. Within any given generation, the number of DRAM stack layers directly determines the trade-off between HBM capacity per GPU and the total number of GPUs that can be shipped.

The final configuration will also hinge on wafer allocation decisions made by memory suppliers. From a supply-demand perspective, HBM bit shipments are projected to grow by 50–60% year-over-year in 2027, a figure that remains insufficient to keep pace with surging demand. Under these supply-constrained conditions, TrendForce expects HBM suppliers to retain pricing power throughout 2027, with significant price increases already widely anticipated across the industry. Consequently, AI chip vendors will face the dual challenge of restricted HBM supply and elevated procurement costs, further incentivizing the adoption of lower-capacity HBM configurations.

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