엔비디아는 랙 규모 AI 시스템을 커스텀 칩에 개방하며, 오프더 shelf GPU 대체안을 모색하는 하이퍼스케일러에게 더 많은 유연성을 제공하고 있다.
Nvidia is opening its rack-scale AI infrastructure to custom accelerators from hyperscalers and other AI developers, expanding NVLink technology beyond its own processors. Through an expanded partnership with MediaTek, customers can design their own AI accelerators (XPUs) on a pre-validated NVLink Fusion platform and integrate them into Nvidia-connected AI factory infrastructure built around the Modular GPU Accelerated (MGX) ecosystem. Nvidia also invested $3.5 billion in convertible bonds issued by MediaTek.
“Ultimately, this gives customers more freedom to innovate without having to rebuild the entire AI factory around custom silicon,” said Dion Harris, senior director of HPC and AI hyperscale infrastructure solutions at Nvidia, during a media Q&A on Monday.
The announcement arrives as hyperscalers accelerate development of their own processors for AI workloads. AWS offers Trainium and Inferentia, Google deploys TPUs, and Microsoft has developed Maia accelerators. Nvidia’s strategy is to ensure that custom silicon remains fully interoperable with its rack-scale stack.
Nvidia states that NVLink Fusion provides a pre-validated foundation for integrating custom XPUs into Nvidia-connected AI factories. The platform combines NVLink Fusion connectivity with NVLink-C2C, high-bandwidth memory (HBM), and chiplet technologies. While customers can leverage Nvidia intellectual property for certain system components, they retain full control over their custom accelerator designs.
“Customers can focus on differentiated compute,” Harris said.
MGX, Nvidia’s modular server and rack reference architecture, underpins the rack-scale infrastructure surrounding these processors. “We’ve built out this incredible ecosystem, which we call MGX, that now all these customers can tap into, and they don’t have to go and reinvent the wheel,” Harris said.
Under the partnership, MediaTek will supply system-on-chip (SoC) design and packaging capabilities for custom XPU developers, while Nvidia provides connectivity and rack-scale infrastructure technologies. “Production AI factories require packaging, HBM, I/O, and networking,” Harris noted. “Customers also have to qualify and certify rack-scale systems at data center scale.”
Neither company identified specific customers developing XPUs through the partnership, nor did they announce concrete data center deployments. Still, as AI infrastructure diversifies, analysts anticipate a broader processor mix, particularly as inference workloads expand.
“Heterogeneity is the future of AI,” said Matt Kimball, vice president and principal analyst at Moor Insights & Strategy. This trend encompasses custom silicon from hyperscalers like AWS and Google, alongside specialized accelerators from other vendors.
These diverse processors require high-speed, scale-up connections to communicate effectively within large systems. “There are effectively three options,” Kimball said. “Scale-up Ethernet, NVLink Fusion, and UALink.” Ethernet remains the established standard for data center networking; NVLink Fusion is Nvidia’s proprietary scale-up technology; and UALink is an open standard being developed by a consortium of chip and infrastructure companies, with AMD among its primary supporters.
“These fabrics are to make scale-up easier and more performant,” Kimball said. “[All] require broad ecosystem support to be meaningful.”
Nvidia originally announced NVLink Fusion in May 2025 and has since broadened industry adoption. According to Kimball, MediaTek joins Astera Labs, Marvell, Samsung, and AIchip in supporting NVLink Fusion for custom silicon, while Arm, Intel, Qualcomm, and SiFive have announced CPU-side support.
Harris emphasized that Nvidia intends to make the technology widely accessible: “This will be available to all of MediaTek’s custom XPU partners.” He also confirmed that AWS plans to deploy a hybrid approach, combining its own processors with Nvidia infrastructure, including NVLink-C2C and NVLink switch technology.
Nvidia has not yet disclosed the licensing model for NVLink Fusion. “There will be some licensing elements in place,” Harris noted.
UALink serves as an open-standard alternative to Nvidia’s proprietary interconnect. AMD champions UALink and is integrating it into its Helios rack-scale AI platform. Helios pairs 72 AMD MI455X accelerators with Epyc processors and Pensando networking, utilizing UALink for scale-up connectivity while relying on Ethernet-based networking for scale-out. These competing architectures reflect a broader industry push to efficiently connect growing numbers of accelerators within AI systems.
Nvidia’s broader strategy is to extend NVLink beyond its own GPUs. “Nvidia is an AI infrastructure company,” Harris said. “Customers need different architectures for different workloads.” The company is actively expanding NVLink past GPU-to-GPU links. Harris explained that NVLink-C2C connects CPUs and GPUs at the chip level, while NVLink switch technology enables scale-up connectivity across multiple processors. For scale-out networking, Nvidia utilizes Spectrum-X Ethernet and InfiniBand, positioning both as complementary layers within its networking stack.
When questioned whether Nvidia’s long-term goal is to dictate AI infrastructure architecture regardless of the underlying accelerator, Harris clarified that it is not about control. “It’s really about being able to take all the technologies that we’ve built over the last several decades, and offering that to the ecosystem,” he said.
Beyond data centers, the MediaTek collaboration continues to advance local AI computing, including upcoming RTX Spark and DGX PC platforms, as well as automotive systems leveraging MediaTek hardware paired with Nvidia AI and graphics capabilities. For the data center segment, however, the immediate focus remains tightly centered on NVLink Fusion and its capacity to support custom accelerators developed by MediaTek’s customer base.