DeepSeek의 AI 시스템에서의 고효율 HBM 사용에 관한 주장이 Samsung Electronics와 SK Hynix의 밸류에이션을 압박하고 있다.

Samsung Electronics shares fell 3.5% and SK Hynix shares fell 2.2% on the Seoul exchange on 11 September 2026 following reports that DeepSeek's AI models require less high-bandwidth memory, or HBM. The market reaction is tangible, but the underlying conclusion—that DeepSeek has permanently reduced global HBM demand—lacks support in the technical picture.

DeepSeek's work demonstrates something narrower and more specific: several architectural techniques can reduce the memory pressure created during inference, particularly for the attention data known as the KV cache. This is not equivalent to eliminating HBM from an AI system.

Investors' concern is straightforward: if each AI request requires less high-bandwidth memory, chipmakers could eventually ship less of it. But this interpretation leaps from a model-level efficiency claim to a global hardware-demand forecast. While connected, the two are not interchangeable. A model can use less memory for one component of inference while still requiring substantial memory for its weights, activations, cross-accelerator communication, and the total throughput demanded by a production service.

The immediate market move therefore reflects concern about near-term semiconductor demand. It does not, on its own, measure worldwide HBM consumption or establish a lasting change in the fundamentals of Samsung Electronics or SK Hynix.

**The memory DeepSeek is actually optimizing**

HBM is stacked DRAM positioned adjacent to an accelerator for very-high-bandwidth data movement. It is central to demanding AI training and inference systems, but it is distinct from a model's KV cache.

The KV cache stores key and value information generated by the attention mechanism as a model processes a conversation or other long sequence. Because this stored state grows with context length, it can become a major source of accelerator-memory pressure during inference.

DeepSeek's Multi-Head Latent Attention (MLA) addresses this pressure by compressing key and value information into latent representations that can be cached. A smaller attention state reduces memory requirements for that particular part of the workload.

Engram takes a different approach, using conditional memory connected to an offloaded memory hierarchy, allowing static or retrievable knowledge to reside outside the accelerator's most constrained memory. The accelerator still performs the model's active computation, while the memory system manages information that need not remain entirely on-device.

These mechanisms address different problems and should not collapse into a single headline figure. MLA concerns compressed attention state. Engram concerns conditional memory and offloading. Neither declares that all physical HBM requirements have vanished.

**What the reported DeepSeek V4 figures mean**

A secondary account attributed two figures to DeepSeek V4 at a one-million-token context: 10% of DeepSeek V3.2's KV-cache requirement and 27% of its single-token inference FLOPs. These are specific workload metrics. The first describes KV-cache use relative to DeepSeek V3.2; the second describes computation for single-token inference. Neither measures total HBM capacity, HBM shipments, or memory-chip revenue.

A separate technical chart shows DeepSeek V4-Pro with 13.7× lower accumulated KV cache than DeepSeek V3.2 at a 1,024K sequence length. That figure belongs to a different model label and presentation and should not merge with the 10% figure as if both measured the same variant, baseline, or condition.

The practical lesson is simple: always specify which memory, which model, which workload, and which context length. Without these four details, "less memory" is too vague to support a hardware-demand forecast.

**Why KV-cache savings do not equal lower HBM shipments**

Imagine an AI accelerator as a busy workshop. The KV cache is one stack of parts beside the workbench—not the entire building. Making that stack smaller creates room, but it does not remove the machinery, raw materials, or traffic moving through the facility.

Several other factors remain critical:

Model weights must be stored somewhere accessible to the system.

Activations—intermediate values created as the model processes input and generates output—still require storage.

Attention and computation: compressing cached state does not eliminate the operations that produce results.

Communication: multi-accelerator systems still move data between devices and memory pools.

Workload shape—long contexts, batch size, response speed, and total concurrent users—all change memory requirements.

Software optimization can also make constrained hardware more useful without changing its physical memory capacity. The NVIDIA H100 and H800 illustrate this distinction: the H100 offers 900 GB/s of interconnect bandwidth, while the H800 provides 400 GB/s. Techniques such as lower-precision computation and low-level tuning help manage bandwidth bottlenecks, but they do not convert memory capacity into bandwidth or make the two resources interchangeable.

HBM and DDR5 also occupy different roles in the system. HBM is built for very high bandwidth near an accelerator; DDR5 is general-purpose system memory. One cannot simply replace the other in every AI workload.

**Could more efficient AI increase memory demand?**

Yes, at least in principle. If inference becomes cheaper, providers may run more requests, support longer contexts, or make AI features available to more users. This possibility is often described through Jevons' paradox: efficiency gains can increase total consumption when they make a resource cheaper to use.

This remains a possibility, not a measured market result. The opposite outcome is also possible for workloads where lower memory pressure directly reduces the amount of hardware needed. The balance depends on deployment scale, model demand, service economics, and the mix of training and inference workloads.

That is why the stock reaction should be read as an early market concern, not as a final verdict on HBM.

**Market context**

Company or benchmark | Reported share movement on 11 September 2026 | Price-to-book context | Distance from all-time high

---|---|---|---

Samsung Electronics | −3.5% | 2.7× current book value | More than 25% below

SK Hynix | −2.2% | 5× current book value | More than 25% below

Philadelphia Semiconductor Index | — | 11× book value | —

The valuation figures provide context for how the companies were viewed at that moment; they are not investment recommendations. Daily market prices move quickly, and a single session cannot settle questions about long-term semiconductor demand.

**What the evidence supports—and what it does not**

DeepSeek's reported efficiency work can reduce KV-cache use and ease accelerator-memory pressure in particular inference conditions. Engram's offloaded memory hierarchy can move conditional-memory work away from the accelerator. MLA can compress the attention state retained during inference.

These represent meaningful engineering developments. They are not equivalent to confirmed reductions in total HBM capacity, HBM shipments, or worldwide demand. HBM remains relevant to model weights, activations, attention, communication, and high-throughput deployment.

The clearest—and most useful—conclusion is also the most measured: DeepSeek may be making AI inference more memory-efficient, but the 11 September market reaction does not prove that HBM demand has permanently fallen. The next move will depend not only on memory saved per request, but also on how much that efficiency expands the number of AI requests the industry can afford to run.