DeepSeek는 화웨이로부터 16만 개의 AI 칩을 대량 주문했으며, 이는 중국 법에 따라 이후 모든 API 쿼리에 대한 새로운 규정 준수 고려사항을 촉발시켰다.

DeepSeek, the Hangzhou-based artificial intelligence laboratory whose January 2025 model releases disrupted global markets, has placed an order for 160,000 Ascend 950DT chips for a massive data center under construction in Ulanqab, Inner Mongolia. If fulfilled, this procurement would establish one of the largest clusters of domestically manufactured Chinese AI chips in history. First reported by Bloomberg on September 4, the order carries a face value of approximately ¥17.76 billion (roughly $2.64 billion USD, based on exchange rates as of September 5, 2026; conversions are approximate) at a unit price of ¥111,000 per chip (approximately $16,500).

The strategic rationale is clear. The Ascend 950DT is specifically engineered for inference—the revenue-generating stage of AI computing where trained models generate responses to user queries. According to people familiar with the matter cited by Bloomberg, DeepSeek plans to deploy these chips exclusively for production workloads at the Ulanqab facility and does not intend to use them for training new models, which remains computationally heavier. Training, where DeepSeek’s most critical technical development occurs, continues to rely on Nvidia hardware, a dependency that has yet to be fully resolved.

This distinction is critical. It defines what this order demonstrates, what it leaves unproven, and what developers or enterprises building on DeepSeek’s API should understand about the actual infrastructure handling their queries.

Understanding why DeepSeek selected the 950DT requires examining the distinct hardware demands of inference versus training. Training an AI model is intensely compute-intensive: systems process vast datasets over days or weeks, adjusting billions of internal weights through repeated gradient calculations. This demands sustained, parallel floating-point throughput—raw computational horsepower where Nvidia’s Hopper and Blackwell architectures excel. Inference operates differently. When a user submits a prompt, the model generates a response token by token, loading relevant weights from memory before each computation step. At production scale, large language model inference is bottlenecked by memory bandwidth, not arithmetic throughput.

The 950DT was designed precisely to address this constraint. It integrates Huawei’s proprietary HiZQ 2.0 high-bandwidth memory (HBM), delivering 144 GB at 4.0 TB/s. Its sibling, the 950PR, utilizes Huawei’s HiBL 1.0 memory, providing 128 GB at 1.6 TB/s and optimizing for the prefill phase (processing initial prompts) rather than the decode phase (generating subsequent tokens). DeepSeek’s preference for the 950DT over the readily available 950PR signals a deliberate optimization for high-throughput token generation at scale. Huawei’s multi-die architecture links two AI compute dies to four HiZQ 2.0 HBM stacks via high-speed die-to-die interconnects, supplemented by an additional 2 TB/s of interconnect bandwidth for cluster communication. The 8,192-chip Atlas 950 SuperPod system will eventually integrate these chips using Huawei’s proprietary UnifiedBus 2.0 interconnect fabric—its equivalent to Nvidia’s NVLink—to deliver what Huawei claims is 8 exaflops of peak AI compute.

Before accepting Huawei’s performance assertions, it is essential to note their provenance: every published specification for the Ascend 950DT originates from Huawei announcements or Chinese-language analyst interpretations. No independent benchmark conducted by a Western auditor has measured real-world performance figures for the chip. Available comparison data, based on Huawei-announced specifications, indicates the 950DT trails Western contemporaries in memory bandwidth. Nvidia’s H200 delivers 4.89 TB/s across 141 GB of HBM3e, while AMD’s Instinct MI300X achieves 6.55 TB/s across 128 GB of HBM3. DeepSeek founder Liang Wenfeng provided the most candid assessment during a leaked July 2026 investor call transcript: “All tasks the GB300 can do, the Huawei supernode can do, latency and all the same. The only cost: four Huawei GPUs equal one Nvidia GPU, and it's two years behind.”

During Huawei Connect 2025, rotating chairman Eric Xu acknowledged a similar reality: individual Ascend chips lag behind Nvidia in raw performance, but assembling them into large-scale clusters can close much of that gap. The Ulanqab deployment will test this premise against real production workloads once operational. Until then, the 4:1 GPU equivalence ratio disclosed by Liang should serve as the baseline working assumption.

The 160,000-chip order confronts a fundamental supply constraint: Huawei cannot currently manufacture that volume of Ascend 950DT units in the near term. The chip’s HiZQ 2.0 HBM is a proprietary design developed specifically to bypass US 2024 export restrictions on HBM2E and HBM3 memory. Advanced HBM stacks require precise through-silicon via (TSV) formation across multiple dies—a process with inherently difficult yield rates, particularly at early production volumes. Bloomberg sources indicate that high-end memory component shortages will limit 950DT supply to several hundred thousand units throughout 2026, with Huawei also fulfilling domestic demand and shipping small international volumes. DeepSeek reportedly petitioned Beijing to intervene and prioritize its allocation, signaling that procurement dynamics have become as political as commercial. Whether the Chinese government elevates this to a national strategic priority will be a significant indicator in the coming months.

Even upon full delivery, the data center will not reach immediate full-scale operation. Bloomberg reporting indicates DeepSeek targets partial operations by late 2027 or early 2028 for at least a portion of the Ulanqab facility. Located in Ulanqab city, approximately 350 kilometers (218 miles) northwest of Beijing, the site was selected for its climate—an average annual temperature of roughly 4°C (39°F) significantly reduces cooling requirements—and for its favorable power costs, which could keep a 1-gigawatt facility well below the pricing typical of Chinese coastal cities.

The hardware transition required substantial engineering effort. Running DeepSeek’s models on Huawei silicon demanded months of co-development, during which DeepSeek adapted its V4 model—the first major release explicitly optimized for Ascend chips—to operate on Huawei’s Compute Architecture for Neural Networks (CANN) software framework. SemiAnalysis confirmed that the V4 model’s Ascend co-design was built from the ground up rather than retrofitted after separate development. CANN functions as Huawei’s counterpart to Nvidia’s CUDA, a distinction with practical implications. Nvidia’s CUDA ecosystem benefits from over a decade of development, billions in tooling investment, and near-universal adoption across AI research frameworks like PyTorch and TensorFlow. CANN remains a younger, more limited ecosystem supported primarily by Chinese developers working on domestic hardware. While Huawei claims the V4-Flash model achieves 10-millisecond latency and the V4-Pro model reaches 20 milliseconds on Ascend clusters, these figures originate solely from Huawei and lack independent verification.

DeepSeek’s earlier attempt to train a model on Huawei silicon stalled due to persistent technical difficulties within the Ascend training stack. According to the Financial Times, training ultimately failed on Huawei hardware, prompting the lab to revert to Nvidia for that workload. The decision to deploy the 950DT exclusively for inference reflects a pragmatic acknowledgment of where Chinese domestic silicon currently holds genuine competitive advantage—and where it does not.

The broader market context framing DeepSeek’s procurement is stark. Bernstein Research forecasts Huawei capturing approximately 50% of China’s AI chip market by the end of 2026, while Nvidia’s share is projected to fall from roughly 40% in 2025 to just 8%. Nvidia sold approximately one million H20 chips to China in 2024, but that distribution pipeline has since been closed.