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Powertech Technology confirms its FOPLP capacity is fully booked by AMD and Broadcom, with co-packaged optics slated for mid-2027 mass production.

Indicates acute bottlenecks in advanced packaging capacity, which will constrain next-generation AI accelerator throughput and timeline.
Trade pressSlicast · August 27, 2026 · US · Source: Google News
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On the 26th, Powertech Technology (6239.TW), a leading Taiwanese outsourced semiconductor assembly and test (OSAT) provider, held a media technology briefing at its P11 facility in the Hsinchu Science Park. Chairman Tsai Tu-Kung unveiled the company’s latest advanced packaging milestones, announcing that its fan-out panel-level packaging (FOPLP) capacity has been fully booked by AMD and Broadcom. Mass production is scheduled to commence in mid-2027, followed by silicon photonics co-packaged optics (CPO) switches entering mass production later that same year, marking a full-scale harvest phase for the company’s advanced packaging roadmap.

Tsai noted that the original plan to add 3,000 wafers per month of FOPLP capacity this year has been adjusted due to extended equipment lead times. The revised schedule now calls for 2,000 wafers to come online in mid-2027, with an additional 5,000 wafers added in 2028. He emphasized that both AMD and Broadcom have secured the entire capacity, underscoring strong market validation of Powertech’s panel-level packaging capabilities.

Lin Chi-Cheng, Senior Vice President of Advanced Packaging Technology R&D and Operations at Powertech, elaborated on the company’s long-term cultivation of advanced packaging technologies. PiFO technology is expected to reach mass production in mid-2027, featuring an architecture comparable to Taiwan Semiconductor Manufacturing’s (2330.TW) CoWoS or CoPoS platforms. In optical communications, optical engine (OE) components will begin small-volume shipments by the end of this year for customer validation, while CPO switches are slated for mass production in 2027. Lin highlighted that Powertech established its FOPLP pilot line in 2016, received approval for fab construction in 2021, and achieved capacity readiness by 2023. As AI chips trend toward higher integration and larger form factors, panels require substantial wafer bumps and extremely high-density fine-line circuitry, where any single line abnormality can significantly impact yield. Powertech’s panel-level packaging yield has already surpassed 90%, and previously concerning warpage issues have been systematically resolved. The current focus has shifted to process integration and detail optimization, with further yield improvements targeting customer specifications.

Powertech’s FOPLP technology can be broadly categorized into four types. The chip-last fan-out panel technology integrates glass substrate redistribution layers (RDL), similar to TSMC's CoWoS-R technology, while the chip-middle fan-out panel technology is comparable to TSMC's CoWoS-L. The company remains highly optimistic about the future application potential of fan-out panel technology within AI chip integration platforms.

Regarding capacity deployment, Powertech’s operations are currently concentrated at the Hsinchu Science Park P11 facility. Following the November 2025 acquisition of AUO’s (2409.TW) L3C building, cleanroom, and ancillary facilities on Lixing Road in the Hsinchu Science Park, that site will serve as the long-term production and R&D base for advanced packaging. Back-end on-substrate (oS) packaging processes will also be conducted there in the future. Lin confirmed that FOPLP mass production yields for AMD shipments remain stable, with the Hsinchu facility serving as the primary supply base. Additionally, Powertech’s joint venture with Broadcom in Singapore will provide supplementary panel-level advanced packaging capacity, further expanding the company’s global footprint.

As AI data center computing demands surge rapidly, high-speed transmission requirements are rising in tandem. Through a dual-track strategy spanning FOPLP and optical communications, Powertech is extending its advanced packaging expertise from AI computing chips into the high-speed optical interconnect space. Market analysts note that Powertech’s simultaneous positioning in both panel-level packaging and CPO—two emerging domains—could generate significant growth momentum for the company, provided mass production timelines are met as scheduled.

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Powertech Technology confirms its FOPLP… · Slicast