Industry analysis highlights a sharp reversal in DRAM pricing trends, with memory costs now rising substantially after years of deflation.

The Hot Chips 2026 conference opened with half-day tutorial sessions on Sunday. Jim Handy, general director at semiconductor market research firm Objective Analysis, led the memory tutorial, providing a comprehensive overview of the DRAM, HBM, and flash markets to set the stage for subsequent technical presentations on high-bandwidth memory and high-bandwidth flash.

We will cover the detailed technical sessions from Micron Technology, Samsung, SK Hynix, d-Matrix, Meta Platforms, and Oxmiq Labs separately. However, like Handy, I believe it is essential to establish a baseline regarding the stratospheric pricing currently affecting DRAM and flash. The market is experiencing a severe demand shock colliding directly with a pronounced supply shortage.

The primary driver is the spending by hyperscalers and cloud providers, who are building the infrastructure required to train increasingly powerful generative AI models and host their production inference workloads. This demand is fueling the HBM and GPU/XPU expansions, alongside the corresponding surges in ancillary DRAM and flash consumption. It is also accelerating the rise of agentic AI, which requires substantial CPU resources, along with significant DRAM and flash capacity, to create sandboxed environments. These sandboxes execute vast quantities of Python code—often generated automatically—to modernize existing applications or build new ones from scratch.

Handy’s data tracks capital expenditure from the beginning of 2021 through the second quarter of this year. The chart reveals a striking disparity: Alibaba, China’s largest hyperscaler and cloud provider, registers minimally against the massive capital expenditures of the United States’ Big Four technology firms: Amazon Web Services, Google Cloud (the cloud division, rather than Alphabet as a whole), Microsoft Azure, and Meta Platforms. Apple, which consumes AI but does not develop it, appears as little more than a line item, with its 2026 AI capital investments actually falling below those of the previous five years. If a company can monetize AI profitably without bearing the capital burden, that is clearly the preferred path.

Driven by hyperscaler demand and renewed enterprise, government, and academic investments aimed at optimizing back-office operations, web infrastructure, and data analytics to accommodate generative AI systems, storage prices across the board are soaring. This includes hard disk drives, which major tech firms continue to purchase in volume for nearly cold storage. Consequently, the five leading memory and flash manufacturers are seeing record revenues, as illustrated by Handy’s aggregated financial data.

The data also captures the memory and flash market crash in late 2022 and early 2023, ironically just as generative AI was gaining traction. Assuming the AI boom continues—with most forecasts projecting sustained growth through at least 2030 and ongoing shortages—the industry has strong reason to expect revenue curves to continue climbing linearly.

“It's all made on the same manufacturing line,” Handy explained to the assembled Hot Chips multitude, referring to flash, DRAM, and HBM. “And so because of that, it's causing DDR prices to go crazy, and all of NAND flash prices are going crazy, and you have the huge revenues. The huge revenues are actually caused by the fact that they are commodity products. Basically, you can buy NAND flash from supplier ABC, and the transition is very easy. That's what a commodity is. You don't really care about the manufacturer; you mostly care about what kind of price you can get. But it also means that the manufacturers, when there's a shortage, then they don't care about you. And they can say, okay, we dealt with this company for a while, except they don't pay their bills on time, and anyway, we can get a higher price from that guy over there, and so they go for the higher price, and so you've got these prices that have gone up about seven times on the spot market, which is not a very good indicator, but it's an easy one to measure and so I put it up here.”

Spot pricing represents a broad average. In reality, system and chip manufacturers integrating memory packages—whether HBM or LPDDR5X DRAM—negotiate individual contracts with specific pricing and volume commitments. Some secure favorable terms, while others face steeper costs depending on their leverage and agreements.

For example, Nvidia has long dominated HBM pricing as the highest-volume buyer during the deep learning and early AI eras. (See “He Who Can Pay Top Dollar For HBM Memory Controls AI Training,” February 2024.) Today, however, Broadcom ranks as the third-largest HBM purchaser, trailing only Nvidia and AMD. Leveraging its substantial financial resources, Broadcom actively competes for HBM capacity on behalf of numerous AI hardware startups that rely on Broadcom and Marvell for chip fabrication and advanced packaging services.

With GPU components fully allocated for 2026 and supply chains likely locked through the end of 2027, Bloomberg reports that Nvidia is warning customers purchasing Grace-Blackwell and Vera-Rubin NVL72 systems next year of a 15 percent price increase. I assume Nvidia has embedded flexible cost-pass-through provisions into its contracts to offset rising HBM, DRAM, and flash expenses, which will cascade through ODM and OEM partners to final system buyers. Frankly, I am surprised the increase is not higher.

Nvidia’s growth remains fundamentally tied to its HBM procurement capacity, a limitation shared by all GPU and XPU developers. To avoid antitrust scrutiny, Nvidia must ensure its competitors also obtain adequate memory capacity. Historically, the U.S. Department of Justice has considered market shares exceeding 85 percent indicative of monopolistic behavior. Today, however, regulatory outcomes appear heavily influenced by prevailing political perspectives, particularly those of President Trump.

The industry must now identify methods to further accelerate computational throughput. We are already seeing progress through externalized, flash-based storage tiers driven by DPUs for KV caches, the integration of compute capabilities into HBM base dies, and Processing-in-Memory (PIM) architectures, which we have frequently covered at The Next Platform. Handy concurs, noting that channel bandwidth requirements are inversely proportional to the processing intelligence at each endpoint.

“In the way of getting you know past the memory wall, we are probably headed towards having smarter memory chips that will end up reducing the amount of traffic it needs to go to the processor,” Handy said in his opening keynote. “And that means that you might have the processor telling the memory do a sort, and the memory does the sort on its own, and then it comes back and it says done, and then the processor says what's on top, and one byte comes back, and that's the end of the job, and that's something that would have involved an awful lot of communication if there weren't the smarts inside the memory chip. So with that, I'm expecting to see AI permeate everywhere. AI can be done on microcontrollers, and I think that there's a new way of thinking that people are working on, that they are saying, oh, you know, it seems to be working over here. Let's try it over there, and that isn't something that people were doing before. There wasn't this readiness to accept it, and so I'm expecting to see AI used at all of the endpoints. I'm expecting to see it in the communication channel, and it will get to the point where it's invisible.”